Overview: Digital sovereignty has become a key requirement for the EU, which is now striving to move from a simple user of ICT technologies to a main player on the digital market, both for products and human skills. The need for the EU (and the EuroHPC JU) to deploy European world-class exascale supercomputers in Europe is urging. The European Processor Initiative (EPI) develops a roadmap for future European high-performance low-power processors aligned with the EuroHPC roadmap. EPI focuses on processor technologies based on the ARM HPC processor architecture and on architecture and HPC accelerator technologies based on RISC-V, the open-source ISA. RISC-V is also the candidate to become Europe’s own technology for covering long-term objectives. This phase also seeks to expand the scope of the project into adjacent European and global vertical markets that can leverage HPC to enable new and improved systems and solutions.
Opis: Digitalna suverenost je postala ključna zahteva EU, ki si prizadeva postati glavni igralec na digitalnem trgu, tako na področju izdelkov kot kompetenc prebivalstva. V tem pogledu je za EU (in skupno podjetje EuroHPC) prednostna vzpostavitev superračunalniške infrastrukture na ravni eksa. Evropska procesorska pobuda (EPI – angl. European Processor Initiative) načrtuje prihodnje evropske visokozmogljive procesorje z nizko porabo energije. EPI se osredotoča na tehnologije, ki temeljijo na procesorski arhitekturi ARM HPC, ter na arhitekturo in tehnologije pospeševalnikov HPC, ki temeljijo na odprtokodnem ISA RISC-V. Arhitektura RISC-V ima potencial, da postane izvirna evropska tehnologija za doseganje zastavljenih ciljev digitalne suverenosti. V tej fazi je cilj tudi razširiti področje uporabe projekta na sosednje evropske in svetovne trge, ki lahko izkoristijo HPC za nove ali izboljšane sisteme in rešitve.
Difficulty: Intermediate
Language: English
Taget audience: Students, researchers, programmers
Skills to be gained: The processor technologies based on the ARM HPC processor architecture and on architecture and HPC accelerator technologies based on RISC-V are presented, as well as activities for achieving digital sovereignty in the field of processor design
Location: UL-FRI, Večna pot 113, Room P21
Organiser:
Lecturer:
| Ime: | Dr. Mario Kovač |
| Opis: |
Prof. Mario Kovac is a full professor at the Faculty of Electrical Engineering and Computing, University of Zagreb, Croatia. He is also an executive, author, and expert in the field of multimedia hardware and software design, business models for computer systems, chip architecture design, and HPC. Currently, he is mostly involved in business relations with industry partners in the area of computer systems and applications and business models in various industry segments, such as HPC and health. |
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